Difference between CISC and RISC Architecture

CISC | Complex instruction set Computing.

1.very large instruction sets reaching up to and above three hundred seperate instructions.

2. Performance was improved by allowing the simplification of program compilers, as the range of more advanced instructions available led to less refinements having to be made at the compilation process. However, the complexity of the processor hardware and architecture that resulted can cause such chips to be difficult to understand and program for, and also means they can be expensive to produce.

3. more specialized addressing modes and registers also being implemented, with variable length instruction codes.

4. Instruction pipelining can not be implemented easily.

5. Many complex instructions can access memory, such as direct addition between data in two memory locations. 

6. Mainly used in normal PC’s, Workstations and servers .

7. CISC systems shorten execution time by reducing the

number of instructions per program.

8. Examples of CISC Processors: Intel x86.

RISC | Reduced instruction set Computing.

1. Small set of instructions.

2. simplified and reduced instruction set, numbering one hundred instructions or less. because of simple instructions, RISC chips requires fewer transistors to produce processors. Also the reduced instruction set means that the processor can execute the instructions more quickly, potentially allowing for greater speeds. However, only allowing such simple instructions means a greater burden is placed upon the software itself. Less instructions in the instruction set means a greater emphasis on the efficient writing of software with the instructions that are available.

3. Addressing modes are simplified back to four or less, and the length of the codes is fixed in order to allow standardization across the instruction set.

4. Instruction pipelining can be implemented easily.

5. Only LOAD/STORE instructions can access memory.

6. Mainly used for real time applications.

7. RISC systems shorten execution time by reducing the clock

cycles per instruction (i.e. simple instructions take less time
to interpret).

8. Examples of RISC Processors: Atmel AVR, PIC, ARM.


Summary:

               CISC                                                                             RISC 

Large (100 to 300)                  Instruction Set                  Small (100 or less)

Complex (8 to 20)                  Addressing Modes                 Simple (4 or less) 

Specialized and complex         Instruction Format                               Simple

Variable                               Instruction Lengths                                Fixed

Variable                               Execution Cycles                  Standard for most

Higher                                 Cost / CPU Complexity                           Lower

Compilation                         Simplifies                              Processor design

Processor design                  Complicates                                      Software

Difficult                              Instruction Pipeline                                  Easy